論文

  2020年度

• T.Dejima, K.Takagi, N.Takagi, "A layout design flow for RSFQ circuits based on cell clustering and mixed wiring of JTLs and PTLs," IEEE Trans. Appl. Supercond., Vol. 30, Issue 7, Article #1302506, 2020.
• N.Kito, K.Takagi, N.Takagi, "Conversion Method of Netlists Consisting of Conventional Logic Gates to RSFQ Logic Circuits Utilizing Special RSFQ Gates," IEEE Trans. Appl. Supercond., Vol. 30, Issue 7, Article #1302306, 2020.

  2019年度

• N. Kito, K. Takagi, N. Takagi, "Conversion of Logic Gates in Netlists for Rapid Single Flux Quantum Circuits Utilizing Confluence of Pulses," IPSJ Trans. System LSI Design Methodology, Vol.12, pp.78-80, 2019.
• N. Kito, R. Odaka, K. Takagi, "Rapid Single-Flux-Quantum Truncated Multiplier Based on Bit-Level Processing," IEICE Trans. Electronics, E102-C(7), pp.607-611, 2019.

国際会議

  2020年度

• N. Kito, K. Takagi, "An RSFQ Flexible-Precision Multiplier Utilizing Bit-Level Processing," 33nd International Symposium on Superconductivity (ISS2020), ED3-2, 2020-12-02.
• S. Nakamura, K. Takagi, N. Kito, N. Takagi, "Static Timing Analysis of an RSFQ Circuit Considering Timing Jitter," 33nd International Symposium on Superconductivity (ISS2020), ED3-4, 2020-12-02.
• T. Kawaguchi, K. Takagi, N. Takagi, "Efficient Timing Fault Simulation of Rapid Single-Flux-Quantum Logic Circuits Considering the Pipelined Behavior," 33nd International Symposium on Superconductivity (ISS2020), ED3-6, 2020-12-02.

  2019年度

• T. Kawaguchi, K. Takagi, N. Takagi Scan Design with Clockless Logic Gates for SFQ Circuits 32nd International Symposium on Superconductivity (ISS2019), EDP2-11, 2019-12-05.
• K. Kitamura, K. Takagi, N. Takagi A Global Routing Method with Wire Length Budgeting for PTL Routing of SFQ Logic Circuits 32nd International Symposium on Superconductivity (ISS2019), EDP2-10, 2019-12-05.
• N. Kito, S. Udatsu, K. Takagi Logic Simulation Tool for RSFQ Circuits Accepting Arrivals of Multiple Pulses in a Clock Period 32nd International Symposium on Superconductivity (ISS2019), ED-4-5, 2019-12-04.
• K. Takagi, M. Ono, N. Kito, N.Takagi Test Pattern Generation for Timing Faults in Rapid Single-Flux-Quantum Circuits Proc. 22nd Workshop on Synthesis And System Integration Mixed Information technologies (SASIMI 2019), R3-16, 2019-10-22.
• N. Kito, T. Kumagai, K. Takagi Rapid Single-Flux-Quantum Matrix Multiplication Circuit Utilizing Bit-Level Processing 22nd Workshop on Synthesis And System Integration Mixed Information technologies (SASIMI 2019), R2-4, 2019-10-21.
• T. Dejima, K. Takagi, N. Takagi Placement and Routing Methods Based on Mixed Wiring of JTLs and PTLs for RSFQ Circuits International Superconducting Electronics Conference (ISEC 2019), 3-PS-P-3, 2019-07-31.
• N. Kito, K. Takagi, N. Takagi, Conversion Method of Netlists Consisting of Conventional Logic Gates to RSFQ Logic Circuits Using the Characteristics of Pulse Logic International Superconducting Electronics Conference (ISEC 2019), 2-PS-P-11, 2019-07-30.