論文

  2023年度

• M.Tanaka, R.Sato, A.Fujimaki, K.Takagi, N.Takagi, "Execution of stored programs by a rapid single-flux-quantum random-access-memory-embedded bit-serial microprocessor using 50-GHz clock frequency,"Appl. Phys. Lett. 122, 192601 (2023)
• N.Kito, T.Kawaguchi, K.Takagi, N.Takagi, "Technology Mapping With Clockless Gates for Logic Stage Reduction of RSFQ Logic Circuits," IEEE Trans. Appl. Supercond., Vol. 33, Issue 5, Article \#1302105, 2023.

  2022年度

• N.Kito, K.Takagi, N.Takagi, "Logic-Depth-Aware Technology Mapping Method for RSFQ Logic Circuits With Special RSFQ Gates," IEEE Trans. Appl. Supercond., Vol. 32, Issue 4, Article \#1300105, 2021.
• T.Kawaguchi, K.Takagi, N.Takagi, "Static Timing Analysis for Single-Flux-Quantum Circuits Composed of Various Gates," IEEE Trans. Appl. Supercond., Vol. 32, Issue 5, Article \#1300809, 2022.

  2021年度

• N.Kito and K.Takagi, "An RSFQ flexible-precision multiplier utilizing bit-level processing," Journal of Physics: Conference Series, 1975(012025), pp.1-8, 2021.
• S.Nakamura, K.Takagi, N.Kito, and N.Takagi, "A Timing Fault Model and an Efficient Timing Fault Simulation Method for Rapid Single-Flux-Quantum Logic Circuits," Journal of Physics: Conference Series, 1975(012026), pp.1-8, 2021.
• T.Kawaguchi, K.Takagi, N.Takagi, "Rapid Single-Flux-Quantum Logic Circuits Using Clockless Gates," IEEE Trans. Appl. Supercond., Vol. 31, Issue 4, Article \#1302407, 2021.

  2020年度

• N.Kito, S.Udatsu, K.Takagi, "Logic simulation tool for RSFQ circuits accepting arrivals of multiple pulses in a clock period," Journal of Physics: Conference Series, 1590 (012041), pp.1-8, 2020.
• K. Kitamura, K. Takagi, N. Takagi, "A two-step routing method with wire length budgeting for PTL routing of SFQ logic circuits," Journal of Physics: Conference Series, 1590 (012043), pp. 1-8, 2020.
• M.Kou, P.-Y.Cheng, J.Zeng, T.-Y.Ho, K.Takagi, H.Yao, "Splitter-Aware Multi-Terminal Routing with Length Matching Constraint for RSFQ Circuits," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, _early_access_, 2020.
• T.Dejima, K.Takagi, N.Takagi, "A layout design flow for RSFQ circuits based on cell clustering and mixed wiring of JTLs and PTLs," IEEE Trans. Appl. Supercond., Vol. 30, Issue 7, Article #1302506, 2020.
• N.Kito, K.Takagi, N.Takagi, "Conversion Method of Netlists Consisting of Conventional Logic Gates to RSFQ Logic Circuits Utilizing Special RSFQ Gates," IEEE Trans. Appl. Supercond., Vol. 30, Issue 7, Article #1302306, 2020.

  2019年度

• N. Kito, K. Takagi, N. Takagi, "Conversion of Logic Gates in Netlists for Rapid Single Flux Quantum Circuits Utilizing Confluence of Pulses," IPSJ Trans. System LSI Design Methodology, Vol.12, pp.78-80, 2019.
• N. Kito, R. Odaka, K. Takagi, "Rapid Single-Flux-Quantum Truncated Multiplier Based on Bit-Level Processing," IEICE Trans. Electronics, E102-C(7), pp.607-611, 2019.

国際会議

  2024年度

• K.Takagi, "Logical Aspects of SFQ Circuit Design," 37th International Symposium on Superconductivity (ISS2024), ED7-2-INV (invited), 2024-12-05.

  2023年度

• E.Yamada, K.Takagi, "Automated FPGA Implementation of Convolutional Neural Networks with Pipelining and Layer Partitioning, Proc. 25th Workshop on Synthesis And System Integration Mixed Information technologies (SASIMI 2024), R1-8, 2024-03-11.

  2022年度

• S.Ohigashi, K.Takagi, "Skew-Distributing Clocking Scheme for Rapid Single-Flux-Quantum Circuits", 15th Superconducting SFQ VLSI Workshop (SSV 2022), P-16, 2022-09-30.

  2021年度

• K.Hasegawa, K.Takagi, N.Takagi, "A Parallel Systolic Pattern Matching Circuit Using Single-Flux-Quantum Circuits," 14th Superconducting SFQ VLSI Workshop (SSV 2021), O-8, 2021-11-09.
• S.Ohigashi, K.Takagi, "Comparison of Various Clocking Schemes for Rapid Single-Flux Quantum Circuits with Feedback Loops Considering Physical Design Factors," 14th Superconducting SFQ VLSI Workshop (SSV 2021), O-20, 2021-11-09.

  2020年度

• N. Kito, K. Takagi, "An RSFQ Flexible-Precision Multiplier Utilizing Bit-Level Processing," 33nd International Symposium on Superconductivity (ISS2020), ED3-2, 2020-12-02.
• S. Nakamura, K. Takagi, N. Kito, N. Takagi, "Static Timing Analysis of an RSFQ Circuit Considering Timing Jitter," 33nd International Symposium on Superconductivity (ISS2020), ED3-4, 2020-12-02.
• T. Kawaguchi, K. Takagi, N. Takagi, "Efficient Timing Fault Simulation of Rapid Single-Flux-Quantum Logic Circuits Considering the Pipelined Behavior," 33nd International Symposium on Superconductivity (ISS2020), ED3-6, 2020-12-02.

  2019年度

• T. Kawaguchi, K. Takagi, N. Takagi Scan Design with Clockless Logic Gates for SFQ Circuits 32nd International Symposium on Superconductivity (ISS2019), EDP2-11, 2019-12-05.
• K. Kitamura, K. Takagi, N. Takagi A Global Routing Method with Wire Length Budgeting for PTL Routing of SFQ Logic Circuits 32nd International Symposium on Superconductivity (ISS2019), EDP2-10, 2019-12-05.
• N. Kito, S. Udatsu, K. Takagi Logic Simulation Tool for RSFQ Circuits Accepting Arrivals of Multiple Pulses in a Clock Period 32nd International Symposium on Superconductivity (ISS2019), ED-4-5, 2019-12-04.
• K. Takagi, M. Ono, N. Kito, N.Takagi Test Pattern Generation for Timing Faults in Rapid Single-Flux-Quantum Circuits Proc. 22nd Workshop on Synthesis And System Integration Mixed Information technologies (SASIMI 2019), R3-16, 2019-10-22.
• N. Kito, T. Kumagai, K. Takagi Rapid Single-Flux-Quantum Matrix Multiplication Circuit Utilizing Bit-Level Processing 22nd Workshop on Synthesis And System Integration Mixed Information technologies (SASIMI 2019), R2-4, 2019-10-21.
• T. Dejima, K. Takagi, N. Takagi Placement and Routing Methods Based on Mixed Wiring of JTLs and PTLs for RSFQ Circuits International Superconducting Electronics Conference (ISEC 2019), 3-PS-P-3, 2019-07-31.
• N. Kito, K. Takagi, N. Takagi, Conversion Method of Netlists Consisting of Conventional Logic Gates to RSFQ Logic Circuits Using the Characteristics of Pulse Logic International Superconducting Electronics Conference (ISEC 2019), 2-PS-P-11, 2019-07-30.